1. Field of the Invention
The present invention relates generally to semiconductor devices and manufacturing methods thereof, and more particularly, to a semiconductor device having a conductive layer and a manufacturing method thereof.
2. Description of the Background Art
There has been known a defect repairing method according to which a circuit hit by a defect and found through examination is switched to a previously provided redundancy circuit, in order to prevent the yield of semiconductor devices from degrading due to defects caused in the manufacturing process. According to the repairing method, during switching the defect-hit circuit with the redundancy circuit, an interconnection for switching (fuse) to the redundancy circuit is fused by laser beam irradiation (laser fusion). FIG. 16 is a cross sectional view showing a fuse portion and its vicinity in a semiconductor device including a fuse layer for achieving conventional laser fusion. Referring to FIG. 16, the conventional semiconductor device including the fuse layer includes a semiconductor substrate 101, a first interconnection layer 102 to be the fuse layer, first and second interlayer insulating films 103 and 105, second interconnection layers 104a and 104b, third interconnection layers 106a and 106b, a passivation film 107, a buffer coat film 108 and an opening 700.
First interconnection layer 102 to be the fuse layer is formed on the surface of semiconductor substrate 101. First interlayer insulating film 103 is formed covering first interconnection layer 102. Second interconnection layers 104a and 104b are formed on first interlayer insulating film 103. Second interlayer insulating film 105 is formed on first interlayer insulating film 103 and second interconnection layers 104a and 104b. Through holes 500 and 600 are formed in regions positioned above second interconnection layers 104a and 104b in second interlayer insulating film 105. In through holes 500 and 600, third interconnection layers 106a and 106b are formed in contact with second interconnection layers 104a and 104b and extending along second interlayer insulating film 105. Passivation film 107 is formed on third interconnection layers 106a and 106b and second interlayer insulating film 105. Buffer coat film 108 is formed on passivation film 107. Part of buffer coat film 108, passivation film 107, second interlayer insulating 105 and first interlayer insulating film 103 is removed to form opening 700 having a width L of about 10 .mu.m.
During switching from the defect-hit circuit to the redundancy circuit, first interconnection layer 102 to be the fuse layer is fused by external laser irradiation. If first and second interlayer insulating films 103 and 105 and the other layers on first interconnection layer 102 have a great thickness, the irradiated laser beam sometimes could not reach and fuse first interconnection layer 102. Thus, opening 700 is formed to entirely remove second interlayer insulating film 105 positioned on the portion of first interconnection layer 102 to be fused and first interlayer insulating film 103 should be reduced in the thickness.
FIGS. 17 to 22 are cross sectional views for use in illustration of the process of manufacturing the conventional semiconductor device including a fuse layer shown in FIG. 16.
Referring to FIGS. 17 to 22, the process of manufacturing the conventional semiconductor device including the fuse layer shown in FIG. 16 will be described.
Referring to FIG. 17, first interconnection layer 102 to be a fuse layer is formed on the surface of semiconductor substrate 101. First interlayer insulating film 103 is formed covering first interconnection layer 102. Second interconnection layers 104a and 104b are formed on first interlayer insulating film 103. Second interlayer insulating film 105 is formed on second interconnection layers 104a and 104b and first interlayer insulating film 103. A resist pattern (not shown) is formed on second interlayer insulating film 105. Using the resist pattern as a mask, second interlayer insulating film 105 is partly etched away and though holes 500 and 600 are formed, followed by removal of the resist. Third interconnection layers 106a and 106b are formed in through holes 500 and 600 in contact with second interconnection layers 104a and 104b and extending along the upper surface of second interlayer insulating film 105. A resist pattern 111 is provided on third interconnection layers 106a and 106b and second interlayer insulating film 105.
Using resist pattern 111 as a mask, first and second interlayer insulating films 103 and 105 are partly anisotropically etched away, and an opening 300 as shown in FIG. 18 is formed, followed by removal of resist pattern 111 (see FIG. 17).
Then, as shown in FIG. 19, passivation film 107 is formed on second interconnection layers 106a and 106b, second interlayer insulating film 105, and in opening 300. Resist pattern 112 is formed on passivation film 107.
Then, using resist pattern 112 as a mask, passivation film 107 positioned in opening 300 is anisotropically etched away. Thereafter, resist pattern 112 is removed to provide a structure as shown in FIG. 20.
Then, as shown in FIG. 21, buffer coat film 108 formed of photosensitive polyimide resin is formed on passivation film 107 and in opening 300. Buffer coat film 108 is heat-treated as will be described, and has its thickness reduced as it changes into its final state by the heat treatment. Thus, buffer coat film 108 must have a thickness in the range from 10 .mu.m to 20 .mu.m in order to secure a desired thickness after the heat treatment.
As shown in FIG. 22, buffer coat film 108 is exposed to light through a mask pattern, developed, and removed of its part positioned on opening 300 (see FIG. 18). Opening 700 is formed as a result.
Then, buffer coat film 108 has its state changed into its final state by heat treatment and a structure as shown in FIG. 16 results.
The conventional semiconductor device including a fuse layer has been manufactured in the above-described manner. In the process of manufacturing the conventional semiconductor device shown in FIGS. 17 to 22, however, first and second interlayer insulating films 103 and 105, passivation film 107, and buffer coat film 108 all should be patterned to obtain a prescribed structure. This increases the number of manufacturing steps involved, resulting in increase in the manufacturing cost.
In order to solve such a disadvantage, a conventional manufacturing process as shown in FIGS. 23 to 25 has been proposed.
Referring to FIGS. 23 to 25, this conventional process of manufacturing a semiconductor device including a fuse layer will be described. Up to the step of forming opening 300 (see FIG. 18), the process is the same as the conventional manufacturing process described in conjunction with FIGS. 17 and 18. As shown in FIG. 23, passivation film 107 is formed on third interconnection layers 106a and 106b, and second interlayer insulating film 105, and in opening 300. Buffer coat film 108 of photosensitive polyimide resin is formed on passivation film 107 in a thickness about in the range from 10 .mu.m to 20 .mu.m.
As shown in FIG. 24, buffer coat film 108 is exposed to light though a mask pattern, followed by development to remove buffer coat film 108 positioned in the region on opening 300.
Then, using buffer coat film 108 as a mask, passivation film 107 positioned in opening 300 (see FIG. 24) is anisotropically etched away, and opening 700 shown in FIG. 25 results. Herein, the proposed process of manufacturing the semiconductor device including a fuse layer employs buffer coat film 108 as a mask in the anisotropic etching for removing passivation film 107 positioned in opening 300, and therefore, the formation/removal of a mask pattern for the anisotropic etching is not necessary. As a result, the number of patterning can be reduced as compared to the manufacturing process described in conjunction with FIGS. 17 to 22, thereby simplifying the manufacturing process.
Thereafter, buffer coat film 108 is heat-treated and has its state changed into its final state, and the structure as shown in FIG. 16 results.
In the conventional manufacturing process as described in conjunction with FIGS. 23 to 25, buffer coat film 108 is used as a mask in the anisotropic etching for removing passivation film 107 positioned inside opening 300 (see FIG. 24). Buffer coat film 108, however, should be formed to have a thickness about in the range from 10 .mu.m to 20 .mu.m as described above. Opening 700 on first interconnection layer 102 to be a fuse layer (see FIG. 16) has width L of about 10 .mu.m as described above. During processing buffer coat film 108 as shown in FIG. 24 in connection with such a fine structure as opening 700, the large thickness of buffer coat film 108 causes the aspect ratio to be increased, and causes incomplete formation of the pattern as shown in FIG. 26, or the size of a resulting pattern varies. Herein, the aspect ratio is the ratio of the width and depth of an opening, and for the same width, the value increases as the depth increases. FIG. 26 is a cross sectional view showing an incomplete pattern of buffer coat film 108 formed in the manufacturing process shown in FIG. 24. The disadvantage has impeded practical applications of the conventional proposed manufacturing process as shown in FIGS. 23 to 25.